The Harvard VLSI Research Group is involved in the design and analysis of a variety of digital, analog, and mixed-signal VLSI systems. High performance computing, signal processing and sensor applications require innovative solutions that may focus on semiconductor device physics, VLSI fabrication technology, circuit design, systems architecture, and/or application software.

 

	The Top K System is an intriguing form of memory based computation. The basic computing component is an IRAM (Intelligent RAM) and is a single chip with a high density 16Mbit DRAM and 800K transistor parallel processor array for computing/sorting/routing. By integrating these IRAM chips, it is possible to implement a fully scalable system for rapidly searching large multidimensional databases at speeds that are orders of magnitude faster than possible with any existing hardware.
	Machine Vision Coprocessors augment the general-purpose computing capabilites of commercial microprocessors like the Pentium by providing highly optimized computing components for many common image processing tasks in machine vision. As a demonstration, we implemented a real-time face recognition system using only a 80486/66 and a VLSI image correlator.
	Ultra Low Bandwidth Video Coder/Decoder uses a vector quantization coding approach that has been optimized for both video applications and VLSI implementation. (see:Full picture of VQ coder)
	Ultra Low Power / Low Voltage DRAM is targeting the market of Portable computer, PDA, cellular phone and so on. Fundamental limitations of Low power and Low voltage for DRAM are being investigated and the solutions will be proposed from the designer's perspective.
	Ultra Low Power Image & Video Compression (under construction)
	Encryption Chip/Smart Card

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	Analog CCD/CMOS Circuitry combines the analog charge manipulation capabilites of CCDs (charge-coupled devices) and CMOS switched-capacitor circuitry to implement low power, low voltage, compact analog signal processing systems. In particular, we have implemented various smart vision sensors with integrated image sensors and analog signal processing circuitry as well as mixed-signal programmable filters.
	CMOS Image Sensors have been implemented using a customized submicron CMOS process. Image sensor elements with high quantum efficiency through the entire visible spectrum, high sensitivity, and good digital noise immunity have been demonstrated. This technology has been used to demonstrate imaging arrays with 512x512 pixel resolution and with integrated ADC and digital interface circuitry.
	Would you like to see new picture of CMOS image sensors? click on me!!

Analysis and Design of Sigma-Delta Systems Sigma-Delta modulators are nonlinear feedback systems that are used in many analog-to-digital and digital-to-analog converters. However, standard analysis techniques which are based on linearizing approximations have only provided limited insight into the optimal design and operation of these systems. By developing a closed-form nonlinear analysis, we have been able to answer many open problems and provide solutions for significantly improving the performance of these systems as data converters. We have specifically focused our attention on issues that will have a profound impact on the design and implementation of practical sigma-delta systems.

Neuromorphic Pulse Computing The vast majority of microelectronic information processing systems are implemented using either analog or digital circuitry. Traditional analog circuitry encodes information as a continuous amount of charge, voltage or current. Similarly, digital circuitry encodes information as quantitized levels of charge, voltage or current. In constrast, we are exploring circuitry and information processing systems that will encode and process information in the time/frequency domain or more generally as a pattern or sequence of asynchronous pulses. While this mode of processing information has been essentially ignored by electrical engineers and computer scientists, it appears to be the dominant mode of information processing in biological neural systems. Although the practical implications of pulse computing have yet to be determined, our long term goal is to develop a model of pulse computation and to demonstrate VLSI systems based on this mode of computation and communication.

 

Faculty	Grad. Students	UnderGrad. Students	Former Members
Woodward Yang	Phil Steiner	Felix Lechner	Alexander Bugeja
	Sang Hoon Hong	David Sobel	Jeffrey Miller
	David Barkin	Jude Mitchell
	Jung Pill kim		Aaron Lipman
	Hanming Rao
	Chen Hu
	Amber
	Yong-Cheol Bae

 Technical Reports/Papers

NANS - A Neural Simulator

Affiliated Institutions:

CBCL at MIT  Harvard Robotics Lab

 We gratefully acknowledge generous support for our research from the National Science Foundation, the Office of Naval Research, the Joint Services Electronics Program, DARPA, Hamamatsu Photonics, Microsoft, and Hyundai Electronics.